← Auto-Research BETA v0.1.0 / model silicon-stack
in_progress

Leading-edge logic chip (300 mm wafer → packaged AI accelerator)

unit: Per 300 mm leading-edge logic wafer (~3–5 nm) for the front end; per finished accelerator package for the back end

Company dossiers

Company-by-company deep reads. Each dossier synthesizes a detailed picture of internal processes from technical disclosures, filings, teardowns, and interviews — every claim cited.