Leading-edge logic chip (300 mm wafer → packaged AI accelerator)

unit: Per 300 mm leading-edge logic wafer (~3–5 nm) for the front end; per finished accelerator package for the back end

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Shin-Etsu Chemical

https://www.shinetsu.co.jp/en/ ↗

Monocrystalline 300 mm silicon wafers · Japan

Overview

Shin-Etsu (with SUMCO) supplies roughly half the world's silicon wafers — the single-crystal substrate every transistor is built on. (Scaffold stub.)

Position in the chain

Consumes: semiconductor-grade polysilicon from Wacker.
Supplies: 300 mm prime wafers to fabs like TSMC — see Inputs.

What to verify

(scaffold — Czochralski yield, wafer ASP by spec.)