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Leading-edge logic chip (300 mm wafer → packaged AI accelerator)

unit: Per 300 mm leading-edge logic wafer (~3–5 nm) for the front end; per finished accelerator package for the back end

Idiot index

I = product cost ÷ raw-input cost. A high number means you are far from the material cost floor — there is room to improve. The denominator is derived from raw-material floors with quoted prices sealed, then reconciled, so the ratio is a real model-vs-reality gap. Each side carries a citation or a labelled estimate.

Leading-edge 3nm wafer vs. the raw silicon atoms in it

60,000×
high confidence
Numerator · TSMC 3nm patterned wafer ASP
Denominator · Raw silicon atoms (~128 g @ MG-Si price)

The headline gap: a finished leading-edge wafer is ~60,000× the cost of the silicon atoms in it. Value is in litho/process, not silicon.

Processed 3nm wafer vs. the blank substrate it started as

90×
high confidence
Numerator · TSMC 3nm patterned wafer ASP
Denominator · Blank 300 mm prime wafer

Fab processing adds ~90× the value of the blank wafer it consumes.

Semiconductor-grade polysilicon vs. metallurgical-grade silicon

31×
medium confidence
Numerator · Electronic-grade (11N) polysilicon
$70 est.
Denominator · Metallurgical-grade silicon (~99%)

Purification from 99% to eleven-nines adds ~30× value (and is energy-hungry — see Energetic Index).

Finished AI accelerator vs. the raw material atoms in it

6,000×
low confidence
Numerator · High-end accelerator street value
$30,000 est.
Denominator · Raw material atoms (Si + dopants + trace)
$5 est.

Scaffold-grade estimate end-to-end; the wafer-vs-atoms row above is the well-sourced one.