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Leading-edge logic chip (300 mm wafer → packaged AI accelerator)

unit: Per 300 mm leading-edge logic wafer (~3–5 nm) for the front end; per finished accelerator package for the back end

← all references

ASML projects $71 billion in revenue by 2030 as EUV demand intensifies (Tom's Hardware)

tier B
2025 · press
https://www.tomshardware.com/tech-industry/semiconductors/asml-projects-usd71-billion-in-revenue-by-2030-as-demand-for-euv-lithography-machines-intensifies-due-to-ai-boom-china-sales-lag-behind-while-company-cashes-in-on-high-end-twinscan-systems ↗

Abstract

ASML projects $71 billion in revenue by 2030 as EUV demand intensifies (Tom's Hardware). Fetched by the auto-model research pass; the figures below are cited from this source in the model's flow, idiot-index, energetic-index, and market tabs.

Key facts

Reviewer note

Real source gathered during the extend-silicon-stack research pass (2026-06-21). Figures attributed to it in the model link back here.